Power supply noise insensitive charge pump, loop filter, VCO control, and VCO

ABSTRACT

An oscillating circuit includes a charge pump, a loop filter and a voltage controlled oscillator. The charge pump and the loop filter generates a differential voltage signal. The loop filter is responsive to the differential voltage signal and generates a filtered differential voltage control signal that is proportional to the differential voltage signal. The voltage controlled oscillator is responsive to the filtered differential voltage control signal and generates a periodic signal that has a frequency that corresponds to the filtered differential voltage control signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to electronic circuits and, morespecifically, to an oscillating circuit that employs a phase-lockedloop.

2. Description of the Prior Art

A voltage controlled oscillator (VCO) is a circuit that generates aperiodic waveform having a frequency that is a function of a voltageinput. In many cases, a differential voltage is applied to the VCO,which generates a waveform having a frequency that is linearlyproportional to the differential voltage.

Many phase-locked loops (PLLs) that are used as clocking circuits inintegrated circuits employ VCOs to generate a stable periodic signalbased on the differential voltage applied to it. A PLL is an electroniccircuit that controls an oscillator so that it maintains a constantphase angle relative to a reference signal. PLLs are used in a varietyof different types of circuits, including communication circuits anddigital integrated circuits. Because the VCO is highly sensitive tonoise in the differential voltage applied to it, such noise willmanifest itself as a deviation from the desired frequency of the PLL.PLLs are extensively utilized as on-chip clock generators to synthesizeand de-skew a higher internal frequency from the external lowerfrequency.

Digital integrated circuit implementations of PLLs frequently experiencesubstrate coupling due to simultaneous circuit switching andpower/ground (P/G) noise, which results in a timing jitter. In a PLL,random variation of the phase, or jitter, is a critical performanceparameter. When used in a microprocessor (or other type of logic chip),PLL jitter can cause the effective cycle time of the microprocessor tobe increased to meet the chip logic timing due to the necessity ofavoiding incorrect cycle changes due to noise. This results in reducedyield and thus increases the cost to meet a desired cycle time. Powersupply noise is one the main contributors to jitter in PLLs.

Therefore, there is a need for a PLL that minimizes jitter in thedifferential voltage applied to the VCO contained therein.

SUMMARY OF THE INVENTION

The disadvantages of the prior art are overcome by the present inventionwhich, in one aspect, is an oscillating circuit that includes a chargepump, a loop filter and a voltage controlled oscillator. The charge pumpgenerates a differential voltage signal. The loop filter is responsiveto the differential voltage signal and generates a filtered differentialvoltage control signal that corresponds to the differential voltagesignal. The voltage controlled oscillator is responsive to the filtereddifferential voltage control signal and generates a periodic signal thathas a frequency that corresponds to the filtered differential voltagecontrol signal.

In another aspect, the invention is a power source for a voltagecontrolled oscillator that generates a periodic signal having afrequency that corresponds to a differential voltage between a firstvoltage input and a second voltage input. The power source includes acharge pump, a loop filter, a first transistor and a second transistor.The charge pump generates a first voltage signal and a complimentarysecond voltage signal corresponding to a desired frequency of theperiodic signal. The loop filter is responsive to the charge pump andgenerates a first filtered signal and a second filtered signal. Thefirst filtered signal corresponds to noise in the first voltage signaland the second filtered signal corresponds to noise in the secondvoltage signal. The first transistor couples the first voltage signal toa first voltage input. The first transistor has a gate driven by thefirst filtered signal so that a first virtual voltage is delivered tothe first voltage input, wherein the first virtual voltage correspondsto the first voltage signal with any noise subtracted therefrom. Thesecond transistor couples the first voltage signal to a second voltageinput. The second transistor has a gate driven by the second filteredsignal so that a second virtual voltage is delivered to the secondvoltage input, wherein the second virtual voltage corresponds to thesecond voltage signal with any noise subtracted therefrom.

In yet another aspect, the invention is a method of removing a jittervoltage from a differential voltage applied to a jitter-sensitivecircuit that responds to the differential voltage. A first differentialsignal that corresponds to the differential voltage is generated andsupplied to an active element that is electrically coupled to thejitter-sensitive circuit. A second differential signal that correspondsto the differential voltage is generated and is filtered so as togenerate a filtered signal that corresponds to the jitter voltage. Theactive element is driven with the filtered signal so that the activeelement drives the jitter-sensitive circuit with a signal thatcorresponds to the differential voltage without the jitter voltage.

These and other aspects of the invention will become apparent from thefollowing description of the preferred embodiments taken in conjunctionwith the following drawings. As would be obvious to one skilled in theart, many variations and modifications of the invention may be effectedwithout departing from the spirit and scope of the novel concepts of thedisclosure.

BRIEF DESCRIPTION OF THE FIGURES OF THE DRAWINGS

FIG. 1 is a schematic diagram of an oscillating circuit.

FIG. 2 is a schematic diagram of an example of a charge pump that may beused in the oscillating circuit shown in FIG. 1.

FIG. 3 is a schematic diagram of a phase-locked loop that may be used inthe oscillating circuit shown in FIG. 1.

FIG. 4 is a schematic diagram of a differential amplifier that may beused in the phase-locked loop shown in FIG. 3.

DETAILED DESCRIPTION OF THE INVENTION

A preferred embodiment of the invention is now described in detail.Referring to the drawings, like numbers indicate like parts throughoutthe views. As used in the description herein and throughout the claims,the following terms take the meanings explicitly associated herein,unless the context clearly dictates otherwise: the meaning of “a,” “an,”and “the” includes plural reference, the meaning of “in” includes “in”and “on.”

As shown in FIG. 1, one illustrative embodiment of an oscillatingcircuit 100 according to the invention includes a charge pump 110 thatgenerates a differential voltage signal, including a first power sourcevoltage VCC (and a corresponding first reference voltage VC) and acomplementary second voltage signal VSS (and a corresponding secondreference voltage VCN). The charge pump 110 contains a common modecircuit that ensures that the average of VC and VCN stays centered atapproximately one-half of the difference between VCC and VSS.

The voltage differential between VC and VCN is controlled by assertingan increment signal INC (to increase the differential) and a decrementsignal DEC (to decrease the differential). A loop filter 120 filters thenoise component from the reference voltages VC and VCN so as to generatea first filtered signal 122 and a second filtered signal 124 thatcorrespond to the VCO voltage V_vcc and V_vss, respectively. The firstfiltered signal 122 drives the gate of a first transistor N1 (such as ann-type field effect transistor) so as to drive current from the firstpower source voltage VCC to a first virtual voltage input V_vcc of avoltage-controlled oscillator 130 so that the first virtual voltageinput V_vcc has a voltage corresponding to the voltage of the firstfiltered signal 122. Similarly, the second filtered signal 124 drivesthe gate of a second transistor P1 (such as an p-type field effecttransistor) so as to drive current from the second power source voltageVSS to a second virtual voltage input V_vss of a voltage-controlledoscillator 130 so that the second virtual voltage input V_vss has avoltage corresponding to the voltage of the second filtered signal 124.The first transistor N1 and the second transistor P1 are biased so thatV_vcc is isolated from VCC and V_vss is isolated from VSS, respectively.Thus the first transistor N1 and the second transistor P1 act as highimpedance sources that filter most jitter or noise that would otherwisebe on V_vcc and V_vss. The voltage controlled oscillator 130 generates aperiodic signal (OUT and OUTB) having a frequency that corresponds to adifferential voltage between a first voltage input and a second voltageinput V_vcc and V_vss.

The loop filter 120 may be embodied as a band-pass filter that removesthe high requency component of the reference voltages VC and VCN,thereby leaving the DC and low frequency control components of thosesignals. The loop filter 120 may include a first element 126 thatincludes a first pair of parallel capacitors C3 and C4 that are disposedelectrically between and in series with a first resistor R1 and a secondresistor R2. A second element 128 includes a second pair of parallelcapacitors C1 and C2. The second element 128 is in parallel with thefirst element 126. The first element 126 and the second element 128 areelectrically coupled to the gate of the first transistor N1 and to afirst reference voltage VC from the charge pump at a first node. Thefirst element 126 and the second element 128 are also electricallycoupled to the gate of the second transistor P1 and to a secondreference voltage VCN from the charge pump at a second node.

One embodiment of the charge pump 110 is shown in FIG. 2. The “INCREASEVC” signal (corresponding to INC) can be asserted to switch additionalcurrent onto the first reference voltage VC. Similarly, the “DECREASEVC” signal (corresponding to DEC) can be asserted to switch additionalcurrent onto the second reference voltage VCN. When the PLL is lockedon, the INC and the DEC signals are in an “off” state, except for shortperiods of time. While they are in the “off” state, the values of VC andVCN remain essentially static and isolated from jitter on VCC and VSS.

In one embodiment, the phase-locked loop 300 could include a pluralitydifferential amplifiers 310, 312 and 314 coupled in series with thedifferential output of the last differential amplifier 314 beingelectrically coupled to the differential input of the first differentialamplifier 310. An exemplary differential amplifier 400 that may be usedwith this embodiment is shown in FIG. 4.

While the embodiments shown relate to removing jitter from anoscillating circuit, it will be readily understood by those in theelectronic circuit design art that this invention could be employed toremove jitter from any circuit that is sensitive to jitter.

The above described embodiments, while including the preferredembodiment and the best mode of the invention known to the inventor atthe time of filing, are given as illustrative examples only. It will bereadily appreciated that many deviations may be made from the specificembodiments disclosed in this specification without departing from thespirit and scope of the invention. Accordingly, the scope of theinvention is to be determined by the claims below rather than beinglimited to the specifically described embodiments above.

1. An oscillating circuit, comprising: a. a charge pump that generates adifferential voltage signal; b. a loop filter, responsive to thedifferential voltage signal, that generates a filtered differentialvoltage control signal that corresponds to the differential voltagesignal; and c. a voltage controlled oscillator that receives currentfrom a power source voltage and that is responsive to the filtereddifferential voltage control signal and that generates a periodic signalthat has a frequency that corresponds to the filtered differentialvoltage control signal.
 2. The oscillating circuit of claim 1, whereinthe voltage controlled oscillator is part of a phase-locked loop.
 3. Theoscillating circuit of claim 1, wherein the differential voltage signalcomprises a first voltage level and a second voltage level that iscomplimentary to the first voltage level.
 4. The oscillating circuit ofclaim 3, wherein the filtered differential voltage control signalcomprises a first filtered voltage signal corresponding to the firstvoltage level in which high frequency components have been filtered outand a second filtered voltage signal corresponding to the second voltagelevel in which high frequency components have been filtered out.
 5. Theoscillating circuit of claim 4, wherein the loop filter is responsive tothe first voltage level and the second voltage level, the loop filtercomprises a band-pass filter that generates the first filtered voltagesignal so as to remove jitter from the first voltage level, and thatgenerates the second voltage signal so as to remove jitter from thesecond voltage level
 6. The oscillating circuit of claim 5, furthercomprising: a. a first active element, responsive to the first voltagesignal, that generates a first virtual voltage input to the voltagecontrolled oscillator; and b. a second active element, responsive to thesecond voltage signal, that generates a second virtual voltage input tothe voltage controlled oscillator whereby the voltage controlledoscillator generates a waveform having a frequency that is linearlyproportional to a differential voltage between the first virtual voltageinput and the second virtual voltage input.
 7. The oscillating circuitof claim 6, wherein the first active element comprises a firsttransistor of a first type having a source coupled to the first voltagesignal and a drain coupled to the first filtered voltage signal and thatis gated by the first filtered signal, and wherein the second activeelement comprises a second transistor of a second type, different fromthe first type, having a source coupled to the second voltage signal anda drain coupled to the second filtered voltage signal and that is gatedby the second filtered signal.
 8. A power source for a voltagecontrolled oscillator that generates a periodic signal having afrequency that corresponds to a differential voltage between a firstvoltage input and a second voltage input, comprising: a. a charge pumpthat generates a first voltage signal and a complimentary second voltagesignal, a differential voltage between the first voltage signal and thesecond voltage signal corresponding to a desired frequency of theperiodic signal; b. a loop filter that is responsive to the charge pumpthat generates a first filtered signal that corresponds to DC and lowfrequency components of the first voltage signal, and a second filteredsignal that corresponds to DC and low frequency components of the secondvoltage signal; c. a first transistor that couples the first voltagesignal to a first voltage input, the first transistor having a gatedriven by the first filtered signal so that a first virtual voltage isdelivered to the first voltage input, the first virtual voltagecorresponding to the first voltage signal with any noise filteredtherefrom; and d. a second transistor that couples the first voltagesignal to a second voltage input, the second transistor having a gatedriven by the second filtered signal so that a second virtual voltage isdelivered to the second voltage input, the second virtual voltagecorresponding to the second voltage signal with any noise filteredtherefrom.
 9. The power source of claim 8, wherein the loop filtercomprises: a. a first element that includes a first pair of parallelcapacitors, the first pair of parallel capacitors between and in serieswith a first resistor and a second resistor; and b. a second element, inparallel with the first element, the second element including a secondpair of parallel capacitors, the first element and the second elementelectrically coupled to the gate of the first transistor and to a firstreference voltage from the charge pump at a first node, the firstelement and the second element also electrically coupled to the gate ofthe second transistor and to a second reference voltage, complimentaryto the first reference voltage, from the charge pump at a second node.10. The power source of claim 8, wherein the first transistor comprisesan n-type transistor and wherein the second transistor comprises ap-type transistor.
 11. A method of removing a jitter voltage from adifferential power source voltage applied to a jitter-sensitive circuitthat responds to the differential voltage, comprising the steps of: a.generating a differential signal that corresponds to a desired controlinput to the jitter-sensitive circuit; b. filtering the differentialsignal so as to generate a filtered signal that corresponds to thedifferential signal substantially without any high frequency components;and c. driving an active element with the filtered signal so that theactive element drives current from the differential power source to thejitter-sensitive circuit.
 12. The method of claim 11, wherein the activeelement comprises a first transistor with first gate electricallycoupled to a first portion of the filtered signal, a first drainelectrically coupled to a first voltage input of the jitter-sensitivecircuit and a first source that is electrically coupled to a firstportion of the first differential signal, and a second transistor, of atype that is opposite to the first transistor, with second gateelectrically coupled to a second portion of the filtered signal, thesecond portion of the filtered signal being of opposite polarity to thefirst portion of the filtered signal, a second drain electricallycoupled to a second voltage input of the jitter-sensitive circuit and asecond source that is electrically coupled to a second portion of thefirst differential signal, the second portion of the first differentialsignal being of opposite polarity to the first portion of the firstportion of the first differential signal, wherein the driving stepcomprises the steps of: a. biasing the first transistor so that thefirst transistor transmits to the first port a signal corresponding to afirst portion of the filtered signal; and b. biasing the secondtransistor so that the second transistor transmits to the second port asignal corresponding to a second portion of the filtered signal.